Testing the Arduino IDE v1.8.9 for aarch64 on the DragonBoard 410c

Posted by Sahaj Sarup on Wednesday, March 13, 2019 New

What’s new with Arduino IDE v1.8.9? The Arduino IDE has supported Arm architecture for a while now, but they only released 32bit binaries, which was fine for older devices like...

External PCIe GPU on the Oxalis

Posted by Sahaj Sarup on Wednesday, March 13, 2019 New

The Oxalis The 96Boards Oxalis is a Enterprise Edition board powered by the NXP Layerscape LS1012A SoC. The main purpose of the SoC and the board itself is for a...

Retraining Tiny Darknet for the Berkley DeepDrive Dataset

Posted by Theodore Grey on Monday, March 4, 2019

Darknet Overview “Darknet is an open source neural network framework written in C and CUDA. It is fast, easy to install, and supports CPU and GPU computation.” - pjreddie/darknet This...

HiKey970 Mainlining Update - Part 2

Posted by Manivannan Sadhasivam on Thursday, February 28, 2019

Introduction Hello and Welcome to the blog on “HiKey970 Mainlining Update - Part 2”. This blog will summarise the recent mainlining efforts for HiKey970 board in Linux kernel. HiKey970 HiKey970...

Binary JukeBox Project

Posted by Sahaj Sarup on Thursday, February 28, 2019

Binary JukeBox Project A Juke-Box like setup. but instead of selecting a song using decimal numbers the user punches in digits in binary! The binary jukebox is controlled via a...

FPGA Mezzanine GPIO Library for Arduino Shields

Posted by Sahaj Sarup on Wednesday, February 20, 2019

The FPGA Mezzanine Library Check out one of my older blogs on this library: WIP FPGA Mezzanine GPIO Library The Arduino header bits of the library are now complete! You...

Sophon Edge Mainlining Update - Part 1

Posted by Manivannan Sadhasivam on Monday, February 4, 2019

Introduction Hello and Welcome to the blog on “Sophon Edge Mainlining Update - Part 1”. This blog will summarise the recent mainlining efforts for Sophon Edge board in Linux kernel....

WIP FPGA Mezzanine GPIO Library

Posted by Sahaj Sarup on Wednesday, January 16, 2019

The FPGA Mezzanine Shiratech FPGA Mezzanine is a 96Boards compatible mezzanine board accommodating Intel MAX10 FPGA. It is 96Boards compatible board, both consumer addition(CE) and enterprise edition (EE). The mezzanine...

Zephyr on 96Boards WisTrio IoT Board

Posted by Manivannan Sadhasivam on Friday, January 11, 2019

Introduction Hello and Welcome to the blog, Zephyr on 96Boards WisTrio IoT Board. This blog gives a quick summary of the recent upstreaming efforts for WisTrio IoT board in Zephyr...

SDR FM on Hikey960 using FL2000: Hacking a VGA Dongle

Posted by Sahaj Sarup on Monday, January 7, 2019

What is SDR? “Software-defined radio (SDR) is a radio communication system where components that have been traditionally implemented in hardware (e.g. mixers, filters, amplifiers, modulators/demodulators, detectors, etc.) are instead implemented...